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| MK2703 PLL AUDIO CLOCK SYNTHESIZER Description The MK2703 is a low-cost, low-jitter, high-performance PLL clock synthesizer designed to replace oscillators and PLL circuits in set-top box and multimedia systems. Using ICS' patented analog Phase Locked Loop (PLL) techniques, the device uses a 27 MHz crystal or clock input to produce a buffered reference clock and a selectable audio clock. ICS manufactures the largest variety of Set-Top Box and multimedia clock synthesizers for all applications. Consult ICS to eliminate VCXOs, crystals and oscillators from your board. Features * Packaged in 8-pin SOIC * Available in Pb (lead) free package * Uses an inexpensive, fundamental mode crystal or clock * Supports MPEG sampling rates of 32 kHz, 44.1 kHz, 48 kHz, and 96 kHz * * * * * Patented zero ppm synthesis error in all clocks All frequencies are frequency locked Advanced, low power, sub-micron CMOS process Operating voltage of 3.3 V or 5 V Industrial temperature version available Block Diagram VDD S1:0 2 PLL Clock Synthesis and Control Circuitry Crystal Oscillator Audio Clock X1 27 MHz crystal or clock input 27M X2 Capacitors are required for crystal tuning GND MDS 2703 H I n t e gra te d C i r c u i t S y s t e m s 1 5 25 Race Stre et, San Jo se, CA 9 5126 Revision 121904 te l (40 8) 2 97-12 01 w w w. i c st . c o m MK2703 PLL AUDIO CLOCK SYNTHESIZER Pin Assignment X1 VDD GND 27M 1 2 3 4 8 7 6 5 X2 S0 S1 CLK AUDIO CLOCK OUTPUT SELECT TABLE S1 0 0 1 1 S0 0 1 0 1 CLK (MHz) 8.192 11.2896 12.288 24.576 Key: 0 = Connect pin directly to ground 8-pin (150 mil) SOIC 1 = Connect pin directly to VDD Pin Descriptions Pin Pin Number Name 1 2 3 4 5 6 7 8 X1 VDD GND 27M CLK S1 S0 X2 Pin Type XI Power Power Output Output Input Input XO Connect to +3.3 V or +5 V. Connect to ground. Pin Description Crystal Connection. Connect to a 27 MHz fundamental crystal or clock. 27 MHz buffered reference clock output. Audio clock output per table above. Audio clock frequency select input #1. Determines CLK output per table above. Internal pull-up resistor. Audio clock frequency select input #0. Determines CLK output per table above. Internal pull-up resistor. Crystal connection to a 27 MHz crystal, or leave unconnected for clock output. External Components Decoupling Capacitor As with any high-performance mixed-signal IC, the MK2703 must be isolated from system power supply noise to perform optimally. A decoupling capacitor of 0.01F must be connected between VDD and GND on pins 2 and 3. It must be connected close to the MK2703 to minimize lead inductance. No external power supply filtering is required for the MK2703. Series Termination Resistor A 33 terminating resistor can be used next to the clock outputs for trace lengths over one inch. Crystal Load Capacitors The total on-chip capacitance is approximately 16 pF. A parallel resonant, fundamental mode, AT cut 27 MHz crystal should be used. The device crystal connections should include pads for small capacitors from X1 to ground and from X2 to ground. These capacitors are used to adjust the stray capacitance of the board to MDS 2703 H In te grated Circuit Systems 2 525 Ra ce Street, San Jose, CA 9512 6 Revision 121904 tel (4 08) 297 -1 201 w w w. i c s t . c o m MK2703 PLL AUDIO CLOCK SYNTHESIZER match the nominally required crystal load capacitance. Because load capacitance can only be increased in this trimming process, it is important to keep stray capacitance to a minimum by using very short PCB traces (and no vias) between the crystal and device. Crystal capacitors, if needed, must be connected from each of the pins X1 and X2 to ground. The value (in pF) of these crystal caps should equal (CL -16 pF)*2. In this equation, CL= crystal load capacitance in pF. Example: For a crystal with an 18 pF load capacitance, each crystal capacitor would be 4 pF [(18-16) x 2] = 4. Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the MK2703. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature, MK2703S (commercial) Ambient Operating Temperature, MK2703SI (industrial) Storage Temperature Soldering Temperature -0.5 V to 7 V Rating -0.5 V to VDD+0.5 V 0 to +70C -40 to +85C -65 to +150C 260C Recommended Operation Conditions Parameter Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Min. -40 +3.13 Typ. Max. +85 +5.50 Units C V DC Electrical Characteristics VDD=3.3 V 5% , Ambient temperature -40 to +85C, unless stated otherwise Parameter Operating Voltage Input High Voltage Input Low Voltage Input High Voltage Input Low Voltage Symbol VDD VIH VIL VIH VIL Conditions X1 pin only Note 1 X1 pin only Note 1 S0, S1 pins S0, S1 pins Min. 3.13 Typ. Max. 5.50 Units V V V V (VDD/2)+1 VDD/2 VDD/2 (VDD/2)-1 2.0 0.8 V MDS 2703 H In te grated Circuit Systems 3 525 Ra ce Street, San Jose, CA 9512 6 Revision 121904 tel (4 08) 297 -1 201 w w w. i c s t . c o m MK2703 PLL AUDIO CLOCK SYNTHESIZER Parameter Output High Voltage Output Low Voltage Output High Voltage, CMOS level Operating Supply Current Short Circuit Current Input Capacitance Nominal Output Impedance Frequency Synthesis Error Internal Pull-up Resistor Symbol VOH VOL VOH IDD Conditions IOH = -12 mA IOL = 12 mA IOH = -4 mA No load VDD = 3.3 V CLK output S0, S1 pins All Clocks Min. 2.4 Typ. Max. 0.4 Units V V V mA mA pF VDD-0.4 25 +50 5 20 0 500 CIN ppm k RPUP S1, S0 pins Note 1: CMOS level input. Nominal trigger point is VDD/2 for 3.3 V or 5 V operation. AC Electrical Characteristics VDD = 3.3 V 5%, Ambient Temperature -40 to +85 C, unless stated otherwise Parameter Input Crystal or Clock Frequency Output Clock Rise Time Output Clock Fall Time Clock Stabilization Time after Power-up Changing Frequency Setting Output Clock Duty Cycle Maximum Absolute Jitter, short term Note 1: Measured with 15 pF load. Symbol FIN tOR tOF Conditions 0.8 to 2.0 V, Note 1 2.0 to 8.0 V, Note 1 Min. Typ. 27 Max. 1.5 1.5 10 10 Units MHz ns ns ms ms % ps at VDD/2, Note 1 tja Deviation from mean 40 190 60 Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Symbol JA JA JA JC Conditions Still air 1 m/s air flow 3 m/s air flow Min. Typ. 150 140 120 40 Max. Units C/W C/W C/W C/W Thermal Resistance Junction to Case MDS 2703 H In te grated Circuit Systems 4 525 Ra ce Street, San Jose, CA 9512 6 Revision 121904 tel (4 08) 297 -1 201 w w w. i c s t . c o m MK2703 PLL AUDIO CLOCK SYNTHESIZER Marking Diagram - MK2703S Notes: 1. ###### is the lot number. 2. YYWW is the last two digits of the year and the week number that the part was assembled. CLOCK MK2703S YYWW Bottom Marking: Line 1: ###### Line 2 & 3: Origin 3. Bottom mark denotes country of origin. Marking Diagram - MK2703SLF CLOCK MK2703SL YYWW Bottom Marking: Line 1: ###### Line 2 & 3: Origin Marking Diagram - MK2703SI MK2703I ###### YYWW$$ Bottom Marking: Origin Marking Diagram - MK2703SILF MK2703IL ###### YYWW$$ Bottom Marking: Origin MDS 2703 H In te grated Circuit Systems 5 525 Ra ce Street, San Jose, CA 9512 6 Revision 121904 tel (4 08) 297 -1 201 w w w. i c s t . c o m MK2703 PLL AUDIO CLOCK SYNTHESIZER Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 8 Millimeters Symbol E INDEX AREA H Inches Min Max Min Max 12 D A A1 B C D E e H h L 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0 8 h x 45 .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .1890 .1968 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0 8 A A1 C -Ce B SEATING PLANE L .10 (.004) C Ordering Information Part / Order Number MK2703S MK2703STR MK2703SLF MK2703SLFTR MK2703SI MK2703SITR MK2703SILF MK2703SILFTR Marking see page 5 see page 5 see page 5 see page 5 Shipping Packaging Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Package 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC Temperature 0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C -40 to +85 C -40 to +85 C -40 to +85 C -40 to +85 C "LF" denotes Pb (lead) free package. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. MDS 2703 H In te grated Circuit Systems 6 525 Ra ce Street, San Jose, CA 9512 6 Revision 121904 tel (4 08) 297 -1 201 w w w. i c s t . c o m |
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